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1. traffic_light_control traffic_light_control Public

   Traffic Light Control Design using RTL

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2. Full-Adder-Design Full-Adder-Design Public

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3. traffic_light_controller traffic_light_controller Public

   Synchronous FSM traffic light controller in Verilog/SystemVerilog parameterized RED/YELLOW/GREEN timing with counter, comparator, and testbench.

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