The example projects tend to be built for boards, using board-specific defines (ICEBREAKER, ULX3S) while many boards share a common FPGA and feature set (ice40, ecp5, etc.). Often only the pinout/clock differ.
Should we get a more fine grained define system? This could be the opportunity to also get an improved (consistent) PLL system and revise/cleanup the pinout names...
The example projects tend to be built for boards, using board-specific defines (ICEBREAKER, ULX3S) while many boards share a common FPGA and feature set (ice40, ecp5, etc.). Often only the pinout/clock differ.
Should we get a more fine grained define system? This could be the opportunity to also get an improved (consistent) PLL system and revise/cleanup the pinout names...