Impedance: tiling-set scanning + Cz reference channel

[cboulay]

Summary

Two related improvements to impedance measurement:

1. Tiling-set scanning engages for recognized nets. readPacketFormat2() now calls setNetSize() (derived from the detected net code) before starting the scan, so ImpedanceMeasurement loads the tiling layout and measures a whole tiling set per collection instead of falling back to channel-by-channel. A full 256-channel scan drops from ~5 minutes to ~1 minute (~6 collections). Nets without a tiling layout still fall back to single-channel scanning. The net code is only known from the first data packet, so it must be (re)applied here even though setup ran earlier.

2. The impedance stream now includes the reference (Cz) electrode. The impedance LSL outlet carries one extra trailing channel labeled Cz, whose value comes from the amplifier's dedicated reference monitor (refMonitor / measureReference()) rather than a regular EEG channel. The impedance stream therefore has one more channel than a standard-net EEG stream.

Changes

• LSLStreamer::createImpedanceOutlet — outlet is now channelCount + 1 channels; appends the Cz channel with its montage location and updates the source-ID channel count.
• ImpedanceMeasurement — currentImpedances_ sized channelCount + 1; the reference impedance is stored/published in the trailing slot. Both the per-tiling-set path (reference reported as channel == -1) and the end-of-cycle measureReference() write into that slot.
• EGIAmpClient::readPacketFormat2 — apply setNetSize() from the detected net code before scanning.
• mock/MockAmplifier — simulate refMonitor in impedance mode so measureReference() sees a realistic reference signal (voltage-divider behavior mirroring the per-channel path).
• Docs (README.md, Impedance.md) updated for the trailing Cz channel and tiling-based scan timing; scripts/requirements.txt adds optional Jupyter deps for the delay-inspection notebook.

Testing

The mock was extended to drive refMonitor in impedance mode, so the Cz reference path can be exercised against the mock without hardware. Hardware validation on a live NA400/NA410 net is still recommended before merge.

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