Run the NPU at 594 MHz, from a fragment that can be commented out

README.md

@@ -84,6 +84,13 @@ carved out of the 256 MB rather than lent to the page allocator, so raising it
 is a straight trade against userspace memory: 32 MB leaves ~220 MB, 64 MB leaves
 ~188 MB.
 
+The NPU runs at **594 MHz**, up from the 500 MHz the clock tree comes up on.
+That lives in its own devicetree fragment, `kernel/dts/*-npu-594mhz.dtsi`;
+comment its `#include` out of the board dts for 500 MHz. The rate does not
+actually belong to the NPU node (its ACLK is a gate on a mux with no divider,
+so the NPU is simply whatever `clk_500m_src` is, and 594 MHz is GPLL/2), which
+is what the fragment is there to explain.
+
 ## CPU frequency, and why it stops at 1.2 GHz
 
 The RV1106 is a 1.6 GHz part and `rv1106.dtsi` has the OPPs to prove it, but
@@ -171,7 +178,8 @@ their own. `systemctl unmask` whichever you want back.
 ```
 board/luckfox-pico-max/
   board.env                    every board-specific number, in one file
-  kernel/dts/                  rv1106g3-luckfox-pico-max.dts
+  kernel/dts/                  rv1106g3-luckfox-pico-max.dts, plus the
+                               optional fragments it #includes
   kernel/config/               the fragment merged over rv1106_defconfig
   kernel/patches/              the few fixes that touch files we do not own
   uboot/tree/                  files copied verbatim into the U-Boot checkout

board/luckfox-pico-max/kernel/config/glibc-distro.config

@@ -272,7 +272,8 @@ CONFIG_MODULE_SRCVERSION_ALL=y
 # rv1106_defconfig leaves debugfs off, which costs more than the RKNPU nodes:
 # the clock framework only publishes rates under /sys/kernel/debug/clk, and
 # that is where npu/rknpu-info reads aclk_rknn from to say whether the NPU
-# really came up at 500 MHz. There is no procfs equivalent to fall back to.
+# really came up at the rate the devicetree asked for. There is no procfs
+# equivalent to fall back to.
 CONFIG_DEBUG_FS=y
 CONFIG_PERF_EVENTS=y
 CONFIG_FTRACE=y

board/luckfox-pico-max/kernel/dts/rv1106g3-luckfox-pico-max-npu-594mhz.dtsi

@@ -0,0 +1,54 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Luckfox Pico Max -- run the NPU at 594 MHz instead of the default 500 MHz.
+ *
+ * Comment the #include of this file out of the board dts to go back to
+ * 500 MHz. Nothing else has to change.
+ *
+ * The NPU's ACLK is a plain gate on aclk_npu_root, and aclk_npu_root is a mux
+ * with no divider, so the NPU runs at exactly whatever its selected parent
+ * runs at. That parent is clk_500m_src. A rate on ACLK_RKNN cannot move it --
+ * a gate has neither .set_rate nor CLK_SET_RATE_PARENT, so the assignment is
+ * silently a no-op -- which is why the number has to be set on clk_500m_src
+ * and why the &npu line below exists only to keep the two written together.
+ * Rockchip's own rv1106g3.dtsi pairs them the same way, at 700 MHz.
+ *
+ * 594 MHz is GPLL/2 exactly (1188/2). The clock is called clk_500m_src because
+ * it comes up on CPLL/2, 1000/2.
+ *
+ * clk_500m_src also feeds aclk_ddr_root and sclk_sfc, so anything sitting on
+ * that leg of their muxes goes up with the NPU. sclk_sfc has its own divider
+ * and the SFC driver asks for the rate it wants; aclk_ddr_root does not, but
+ * Rockchip run this same clock at 700 MHz on the G3, so 594 is inside what the
+ * SoC is expected to take.
+ */
+
+/*
+ * assigned-clocks replaces the property wholesale rather than appending to it,
+ * so rv1106.dtsi's whole list has to be repeated here -- a dropped entry would
+ * revert that clock to its boot value. Only CLK_500M_SRC is new.
+ *
+ * CPLL deliberately stays at 1000 MHz: clk_250m_src, clk_100m_src and
+ * clk_50m_src are exact CPLL divisions (/4, /10, /20) and would come out
+ * wrong at any other rate.
+ */
+&cru {
+	assigned-clocks =
+		<&cru PLL_GPLL>, <&cru PLL_CPLL>,
+		<&cru ARMCLK>,
+		<&cru ACLK_PERI_ROOT>, <&cru HCLK_PERI_ROOT>,
+		<&cru PCLK_PERI_ROOT>, <&cru ACLK_BUS_ROOT>,
+		<&cru PCLK_TOP_ROOT>, <&cru PCLK_PMU_ROOT>,
+		<&cru HCLK_PMU_ROOT>, <&cru CLK_500M_SRC>;
+	assigned-clock-rates =
+		<1188000000>, <1000000000>,
+		<1104000000>,
+		<400000000>, <200000000>,
+		<100000000>, <300000000>,
+		<100000000>, <100000000>,
+		<200000000>, <594000000>;
+};
+
+&npu {
+	assigned-clock-rates = <594000000>;
+};

board/luckfox-pico-max/kernel/dts/rv1106g3-luckfox-pico-max.dts

@@ -127,6 +127,13 @@
 	status = "okay";
 };
 
+/*
+ * Overclock the NPU to 594 MHz. Comment this line out for the 500 MHz the
+ * clock tree comes up on; it has to sit after &npu, because a later override
+ * wins. The dtsi explains what actually carries the rate.
+ */
+#include "rv1106g3-luckfox-pico-max-npu-594mhz.dtsi"
+
 /* ---------------------------------------------------------------- flash --- */
 
 &sfc {

scripts/build-kernel.sh

@@ -38,7 +38,9 @@ shopt -u nullglob
 # dropped in before configuring. Registering it in the Makefile keeps the
 # normal `make dtbs` target working.
 dtsdir="$k/arch/arm/boot/dts/rockchip"
-cp -f "$BOARD_DIR"/kernel/dts/*.dts "$dtsdir/"
+# .dts and .dtsi both: the board dts #includes its optional fragments by name,
+# and cpp resolves those against the directory it is compiling from.
+cp -f "$BOARD_DIR"/kernel/dts/*.dts* "$dtsdir/"
 if ! grep -q "$KERNEL_DTS.dtb" "$dtsdir/Makefile"; then
 	log "registering $KERNEL_DTS.dtb"
 	printf 'dtb-$(CONFIG_ARCH_ROCKCHIP) += %s.dtb\n' "$KERNEL_DTS" >> "$dtsdir/Makefile"