LeNet-1-Archietecture---ES-203-Digital-Systems-Course

An inference model of LeNeT 1 architecture in Verilog.
This Repository contains Implimentation files of Inference model of LeNeT 1 archietecture in Verilog and training model in Python.

Name		Name	Last commit message	Last commit date
Hardware Accelerator		Hardware Accelerator
README.md		README.md

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