Releases: eclipse-threadx/threadx
Eclipse ThreadX v6.5.1.202602a
Eclipse ThreadX 6.5.1.202602a Release Notes
This hotfix release corrects a critical compilation regression introduced in v6.5.1.202602 that prevented projects from building when targeting Cortex-M3, Cortex-M4, or Cortex-M7 processors. It also delivers Linux build script coverage for all GNU-toolchain ports touched in v6.5.1.202602.
Vulnerabilities addressed
No new vulnerabilities were addressed in this release. You can access advisories for previously addressed vulnerabilities here https://github.com/eclipse-threadx/threadx/security/advisories.
Bug Fixes
Critical: #endif without #if compilation error in tx_port.h (#545, #546)
In v6.5.1.202602, an #else directive was incorrectly replaced with #endif in the #ifdef TX_PORT_USE_BASEPRI / __set_basepri_value block, causing the following error when compiling for affected targets:
tx_port.h: error: #endif without #if
The following ports are affected and have been corrected:
cortex_m3/ac6,cortex_m3/gnu,cortex_m3/iarcortex_m4/ac6,cortex_m4/gnu,cortex_m4/iarcortex_m7/ac6,cortex_m7/gnu,cortex_m7/iar
Thanks to @s-w-k-r for reporting this issue.
Fixed missing linker script symbols in cortex_m4/gnu example build
The cortexm4_crt0.S startup file referenced several symbols (__text_load_start__, __rodata_start__, __fast_load_start__, and others) that were absent from sample_threadx.ld, causinglinker errors when building the sample application. The linker script has been updated to define all required symbols.
Enhancements
Linux build scripts for GNU-toolchain ports
build_threadx.sh (and build_threadx_sample.sh where applicable) have been added as Linux equivalents of the existing Windows .bat build scripts for all GNU-toolchain ports changed sincev6.5.0:
arm9, arm11, cortex_a5, cortex_a7, cortex_a8, cortex_a9, cortex_a12, cortex_a15, cortex_a17, cortex_m0, cortex_m23, cortex_m33, cortex_m55, cortex_m85, cortex_r4,cortex_r5
A pre-existing path bug in the cortex_m23/gnu build script (tx_thread_stack_error_handler.c and tx_thread_stack_error_notify.c were referenced from the port directory instead ofcommon/src/) has also been corrected.
Full Changelog: v6.5.1.202602_rel...v6.5.1.202602a_rel
Contributors
Assets 2
Eclipse ThreadX v6.5.1.202602
Eclipse ThreadX 6.5.1.202602 Release Notes
This release expands hardware platform support with major RISC-V improvements — including three new boards and the addition of support for the RISC-V Vector Extension (RVV) — and introduces native Win64 ports for both ThreadX and ThreadX SMP. It also delivers a significantly updated Xtensa port, QEMU-based automated CI forRISC-V, and several bug fixes for Cortex-M and RISC-V targets.
We thank contributors from 10xEngineers, Alibaba, Bradford Space, Cadence Design Systems, JBLopen, Quintauris, Taktflow Systems, and Volz Servos for their valuable contributions to this release.
Vulnerabilities addressed
No new vulnerabilities were addressed in this release. You can access advisories for previously addressed vulnerabilities here.
Highlights
RISC-V Expanded Support
This release includes the most significant expansion of RISC-V support to date:
- RVV (Vector Extension): The RISC-V 64-bit architecture port and the
qemu_virtexample now support the RISC-V Vector Extension (RVV). (#508, @goodnorning) - Port consolidation: The RV32 and RV64 ports have been refactored and consolidated for maintainability. Toolchain files have been cleaned up (
riscv32-unknown-elf,riscv-none-elf-rv32imcfor xPack users). (#536, #537, #539, @fdesbiens) - Performance: Lazy FPU save/restore and GP relaxation have been implemented for the GNU RISC-V 32-bit port.(#513, @Winstonllllai)
- Bug fixes: A critical bug where MPIE was cleared after an
mretinstruction — causing interrupts to be permanently disabled — has been fixed. (#522, @cpdpls) A misalignment issue caused by an incorrectULONGsize definition has also been corrected. (#534, @cpdpls)
New RISC-V Hardware Platforms
Three new platforms are now supported:
- Bananapi BPI-F3 (SpacemiT K1 SoC) BSP (#531, @akifejaz)
- OpenHW CORE-V MCU platform port (#535, @fdesbiens)
- OpenHW CVA6 (RISC-V 32-bit) (#511, @francisco-merino-quintauris)
New Win64 Port
ThreadX and ThreadX SMP now have native Windows 64-bit (Win64) ports, enabling development and testing on modern 64-bit Windows systems. (#529, @fdesbiens)
Xtensa Improvements
The Xtensa port has been updated with contributions from the Cadence foss-xtensa fork, including: (#525, @ianstcdns)
- LX8 support for more than 32 interrupts
- Context switch logic fixes
- Interrupt fixes for
TX_ENABLE_EXECUTION_CHANGE_NOTIFY - Support for
__DYNAMIC_REENT__ - Execution profiling support
QEMU-based CI for RISC-V
Automated regression test infrastructure using QEMU has been added for both RV32 and RV64. (#526, @akifejaz)
Other Bug Fixes
- Fixed race condition and message loss in Cortex-M GNU ports (#523, @fdesbiens)
- Fixed SysTick initialisation in
tx_initialize_low_level.s(#278, @Polarisru) - Fixed incorrect
-mcpu=cortex-a9link flag (#273, @hodcarrier) - Removed duplicate
invalidateCaches_ISdeclaration (#273, @hodcarrier) - Fixed incorrect default value of
TX_TIMER_TICKS_PER_SECONDintx_user_sample.h(#521, @jblanchard-jblopen)
Build System
- Added conditional CMake support for ThreadX SMP (#524, @fdesbiens)
- Fixed
THREADX_ARCHundefined when building ThreadX as a standalone CMake library (#540, @fdesbiens)
New Contributors
- @jblanchard-jblopen made their first contribution in #521
- @MrNetic made their first contribution in #270
- @hodcarrier made their first contribution in #273
- @Polarisru made their first contribution in #278
- @howjmay made their first contribution in #361
- @nhuvaoanh123 made their first contribution in #514
- @cpdpls made their first contribution in #522
- @ianstcdns made their first contribution in #525
- @Winstonllllai made their first contribution in #513
Full Changelog: v6.5.0.202601_rel...v6.5.1.202602_rel
Contributors
Assets 2
Eclipse ThreadX v6.5.0.202601
This release introduces significant enhancements for RISC-V support, including a new RISC-V32 architecture port layer, a Clang port, and improved robustness for RV64/GNU. It also adds support for the XuanTie E906 CPU and resolves VFP build failures on Cortex-A platforms.
Important notice about version numbers
In the past, new versions of ThreadX and its companion components (NextX Duo, USBX, FileX, GUIX, LevelX) were published only when there were changes to the codebase. This led to discrepancies in version numbers across components. The Eclipse Foundation security team recommended that we move away from this approach, as it makes it harder to track things from a cybersecurity standpoint.
Going forward, we will keep version numbers aligned by publishing a new version of every component every quarter — whether there have been changes to the codebase or not. The release notes will clearly state if a specific release is simply a version number update.
Vulnerabilities addressed
No new vulnerabilities were addressed in this release. You can access advisories for previously addressed vulnerabilities here.
What's Changed
- Improve RV64/GNU port robustness, portability, and CSR handling by @akifejaz in #496
- Added missing ULONG64 definition for RX ports needed by USBX and NetX Duo by @spir6s in #494
- Added a RISC-V32 arch. port layer by @akifejaz in #490
- Removed dead code from riscv64/gnu port by @akifejaz in #501
- Added a RISC-V32 QEMU-virt example by @akifejaz in #492
- Added a missing symbol to tx_api.h for TX SMP. by @fdesbiens in #503
- Added the AX attribute to ThreadX module example build preamble.S files by @fdesbiens in #504
- Updated the RV64 QEMU examples as per the new RV port format by @akifejaz in #506
- Fixed a VFP build failure in Cortex-A tx_thread_schedule.S by @mehmetteren in #493
- Added support for the XuanTie E906 CPU. by @goodnorning in #500
- Added an RV32 Clang port by @francisco-merino-quintauris in #502
New Contributors
- @akifejaz made their first contribution in #496
- @mehmetteren made their first contribution in #493
- @goodnorning made their first contribution in #500
- @francisco-merino-quintauris made their first contribution in #502
Full Changelog: v6.4.5.202504_rel...v6.5.0.202601_rel
Contributors
Assets 2
Eclipse ThreadX 6.4.5.202504
This release fixes a typo in the name of one of the common constants. It also addresses a security vulnerability in the POSIX compatibility layer.
Important notice about version numbers
In the past, new versions of ThreadX and its companion components (NextX Duo, USBX, FileX, GUIX, LevelX) were published only when there were changes to the codebase. This led to discrepancies in version numbers across components. The Eclipse Foundation security team recommended that we move away from this approach, as it makes it harder to track things from a cybersecurity standpoint.
Going forward, we will keep version numbers aligned by publishing a new version of every component every quarter — whether there have been changes to the codebase or not. The release notes will clearly state if a specific release is simply a version number update.
For this particular release of ThreadX, the version number jumped from v.6.4.3 to v.6.4.5 to catch up with NetX Duo.
What's Changed
Vulnerabilities addressed
CVE-2026-0648 Persistent Initialisation Pointer Corruption in the POSIX Compatibility Layer
New Contributors
Full Changelog: v6.4.3.202503_rel...v6.4.5.202504_rel
Contributors
Assets 2
Eclipse ThreadX v.6.4.3.202503
The main change in this release is the new configuration parameter TX_QUEUE_MESSAGE_MAX_SIZE in tx_api.h, which defines the maximum message size for queues. The default value is set to TX_ULONG_16 to maintain backwards compatibility.
Vulnerabilities addressed
- CVE-2025-55078 A kernel object pointer validation flaw in ThreadX system calls allows attackers to supply pointers to reserved memory regions.
- CVE-2025-55079 Module thread can achieve higher priority than txm_module_instance_maximum_priority
- CVE-2025-55080 Improper Parameter Check in ThreadX Syscall Implementation
What's Changed
- Made queue max message size configurable. by @rahmanih in #447
- Documented GNU library compile flags for Linux and SMP Linux. by @hnguyenHWI in #449
- Prevented analysis when stack overflow has occured. by @gzzi in #464
- Fixed an IAR include typo. by @ericminnerath in #463
- Completed the implementation of a configurable queue max size (ThreadX SMP). by @fdesbiens in #467
CI
- Added new label for all created issues, enforce the use of issue templates by @netomi in #387
- Added workflow permissions. by @fdesbiens in #453
- Updated all actions to their latest release. by @fdesbiens in #454
- Fixed code coverage artefacts upload by @fdesbiens in #455
- Added condition to "Coverage Report Name". Corrected formatting. by @fdesbiens in #456
- Fixed code coverage report download step in deploy_code_coverage. by @fdesbiens in #457
- Ported CI fixes to dev branch by @fdesbiens in #465
New Contributors
- @netomi made their first contribution in #387
- @rahmanih made their first contribution in #447
- @hnguyenHWI made their first contribution in #449
- @gzzi made their first contribution in #464
- @ericminnerath made their first contribution in #463
Full Changelog: v6.4.2_rel...v6.4.3.202503_rel
Contributors
Assets 2
Eclipse ThreadX RTOS 6.4.2
This is a small service release fixing a few CMake issues.
The main new feature is the RISC-V QEMU support contributed by @Jer6y. Thank you very much!
What's Changed
- Update README.md by @wickste in #363
- Update branding in issues template by @wickste in #372
- Copyright name change by @ravurinaresh in #378
- Added missing CMakeLists.txt for Renesas RX ports by @spir6s in #423
- Bump actions/download-artifact from 3 to 4.1.7 in /.github/workflows by @dependabot in #407
- riscv : add riscv qemu virt support and fix fs bit error in mstatus by @Jer6y in #416
- Upgrading upload-artifact version to 4.6.0. by @fdesbiens in #438
- Version 6.4.2 by @fdesbiens in #439
- Updated CMake minimal version by @fdesbiens in #441
- Release ThreadX 6.4.2 by @fdesbiens in #442
New Contributors
- @ravurinaresh made their first contribution in #378
- @spir6s made their first contribution in #423
- @Jer6y made their first contribution in #416
- @fdesbiens made their first contribution in #438
Full Changelog: v6.4.1_rel...v6.4.2_rel
Contributors
Assets 2
Eclipse ThreadX RTOS 6.4.1
What's Changed
- msft azure label rtos update by @ericwol-msft in #343
- Security.md update by @ericwol-msft in #347
- Update copyright. by @bo-ms in #349
- Update version id string. by @bo-ms in #350
- Update README.md text by @timlt in #351
- Create SECURITY.md by @wickste in #352
- Update CONTRIBUTING.md by @wickste in #354
- Update CONTRIBUTING.md by @wickste in #353
- update license.txt and delete licensed-hardware.txt by @wickste in #355
- Update README.md by @wickste in #362
- Update the copyright for all assembly files. by @bo-ms in #364
- Update version number to 6.4.1 by @TiejunMS in #365
- Add revision history file. by @bo-ms in #366
New Contributors
- @ericwol-msft made their first contribution in #343
- @bo-ms made their first contribution in #349
- @timlt made their first contribution in #351
Full Changelog: v6.4.0_rel...v6.4.1_rel
Contributors
Assets 2
Azure RTOS ThreadX 6.4.0
What's Changed
- Removed redundant sample_threadX project from Cortex A7 ports_module I… by @yajunxiaMS in #312
- Added thumb mode support for threadX GNU ports on armv7a platforms. by @yajunxiaMS in #333
- Add check for overflow in queue size calculation in RTOS compatibility layer. by @xiuwencai in #339
- Add error handling in lock initialization in the Xtensa port by @xiuwencai in #340
New Contributors
- @ting-ms made their first contribution in #314
- @xiaocq2001 made their first contribution in #327
- @wenhui-xie made their first contribution in #336
Full Changelog: v6.3.0_rel...v6.4.0_rel
Contributors
Assets 2
Azure RTOS ThreadX 6.3.0
What's Changed
Bug Fixes and New Features
- Fix random failure in test case threadx_event_flag_suspension_timeout_test.c by @TiejunMS in #246
- Include tx_user.h in cortex_m3/4/7 IAR and AC5 port by @TiejunMS in #255
- Include tx_user.h in cortex_m33/55/85 IAR port by @TiejunMS in #267
- Add random number stack filling option by @xiuwencai in #257
- Fix MISRA issues for ThreadX SMP by @TiejunMS in #263
- Export _tx_handler_svc_unrecognized as weak symbol. by @xiuwencai in #264
- Fix compile warnings in Linux port. by @yanwucai in #276
- Added memory barrier before thread scheduling for ARMv8-A ThreadX SMP. by @TiejunMS in #280
- Added thumb mode support under GNU for module manager on Cortex-A7 by @yajunxiaMS in #287
- Added thumb mode support under IAR for module manager on Cortex-A7 by @yajunxiaMS in #289
- Fixed the issue of the data/bss section cannot be read from ARM FVP by @yajunxiaMS in #301
- Improved the logic to validate object from application in ThreadX Module by @TiejunMS in #307
Others
- Update LICENSED-HARDWARE.txt by @wickste in #236
- Update LICENSE.txt by @wickste in #261
- Release ARMv7-M and ARMv8-M architecture ports by @TiejunMS in #249
- Release ARMv7-A architecture ports and add tx_user.h to GNU port assembly files by @TiejunMS in #250
- Unify ThreadX and SMP for ARMv8-A. by @TiejunMS in #275
- Update devcontainer to Ubuntu 22.04 by @TiejunMS in #253
- Release scripts to validate ThreadX port by @TiejunMS in #254
- Add a pull request template by @TiejunMS in #272
New Contributors
- @wickste made their first contribution in #236
- @xiuwencai made their first contribution in #257
- @yanwucai made their first contribution in #276
- @yajunxiaMS made their first contribution in #287
Full Changelog: v6.2.1_rel...v6.3.0_rel
Contributors
Assets 2
Azure RTOS ThreadX 6.2.1
Full Changelog:
- Add tx_user.h to GNU port assembly files
- RISC-V 64 bit port for Microchip
- Link Winmm.lib that required by the high-resolution timer.
- Update Win32 port with high resolution timer.
- Add DMB ISH barrier inst in ARMv8-A SMP scheduler
- Add .section .preamble to m3 m4 m7 module ports
- Add missing parenthesis in ports assembly file
- Modules Cortex-A7 IAR new port
- Modules Cortex-A7 GNU new port
- Fix race condition in tx_thread_wait_abort and update regression test
- armv8-m compile time FPU fix
- added tx_trace.h include to module stop.c
- #include tx_user.h in assembly files for cortex-m ports
- initial port of MIPS SMP for GHS and GNU
- capitalize extensions for M23 asm files
- Fix armv7-m MPU settings for corner case, unify txm_module_port.h files
- remove uneeded include for ac6
- update riscv iar example for latest iar tools
- check module stack for overlap (not kernel stack)
- apply patch from mobileye to fix time slice processing
- initialize unused MPU settings so that aliasing will work
- add config directory to IAR RISC-V port in order to use simulator